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1 typical application features description 42v in micropower no-opto isolated flyback converter with 65v/1.2a switch the lt ? 8301 is a micropower isolated flyback converter. by sampling the isolated output voltage directly from the primary-side flyback waveform, the part requires no third winding or opto-isolator for regulation. the output voltage is programmed with a single external resistor. in - ternal compensation and soft-start further reduce external component count. boundar y mode operation provides a small magnetic solution with excellent load regulation. low ripple burst mode operation maintains high efficiency at light load while minimizing the output voltage ripple. a 1.2a, 65v dmos power switch is integrated along with all high voltage cir cuitry and control logic into a 5-lead thinsot? package. the lt8301 operates from an input voltage range of 2.7v to 42v and can deliver up to 6w of isolated output power. the high level of integration and the use of boundary and low ripple burst modes result in a simple to use, low component count, and high efficiency application solution for isolated power delivery. l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5438499, 7463497, and 7471522. 2.7v to 36v in /5v out micropower isolated flyback converter applications n 2.7v to 42v input voltage range n 1.2a, 65v internal dmos power switch n low quiescent current: 100a in sleep mode 350a in active mode n boundary mode operation at heavy load n low-ripple burst mode ? operation at light load n minimum load <0.5% (typ) of full output n v out set with a single external resistor n no transformer third winding or opto-isolator required for regulation n accurate en/uvlo threshold and hysteresis n internal compensation and soft-start n output short-circuit protection n 5-lead tsot-23 package n isolated telecom, automotive, industrial, medical power supplies n isolated auxiliary/housekeeping power supplies efficiency vs load current lt8301 3:1 r fb sw 40h 4.4h en/uvlo 10f v in v in 2.7v to 36v v out + 5v 6ma to 0.40a (v in = 5v) 6ma to 0.70a (v in = 12v) 6ma to 1.00a (v in = 24v) 6ma to 1.15a (v in = 36v) v out ? gnd 154k 100f 8301 ta01a load current (a) 0 60 efficiency (%) 65 70 75 80 90 0.2 0.4 0.6 0.8 8301 ta01b 1.0 1.2 85 v in = 5v v in = 12v v in = 24v v in = 36v lt8301 8301f for more information www.linear.com/lt8301
2 pin configuration absolute maximum ratings sw (note 2) ............................................................. 65v v in ........................................................................... 42v e n/uvlo ................................................................... v in r fb ...................................................... v in C 0.5v to v in current into r fb ................................................... 200 a operating junction temperature range (notes 3, 4) lt8301e, lt8301i .............................. C 40c to 125c lt8301h ............................................ C 40c to 150c lt8301mp ......................................... C5 5c to 150c storage temperature range .................. C 65c to 150c (note 1) en/uvlo 1 gnd 2 top view s5 package 5-lead plastic tsot-23 r fb 3 5 v in 4 sw ja = 150c/w order information lead free finish tape and reel part marking* package description temperature range lt8301es5#pbf lt8301es5#trpbf ltgmf 5-lead plastic tsot-23 C40c to 125c lt8301is5#pbf lt8301is5#trpbf ltgmf 5-lead plastic tsot-23 C40c to 125c lt8301hs5#pbf lt8301hs5#trpbf ltgmf 5-lead plastic tsot-23 C40c to 150c lt8301mps5#pbf lt8301mps5#trpbf ltgmf 5-lead plastic tsot-23 C55c to 150c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ lt8301 8301f for more information www.linear.com/lt8301
3 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the sw pin is rated to 65v for transients. depending on the leakage inductance voltage spike, operating waveforms of the sw pin should be derated to keep the flyback voltage spike below 65v as shown in figure 5. note 3: the lt8301e is guaranteed to meet performance specifications from 0c to 125c operating junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 5v, v en/uvlo = v in unless otherwise noted. symbol parameter conditions min typ max unit v in input voltage range l 2.7 42 v v in uvlo threshold rising falling 2.5 2.3 2.65 v v i q v in quiescent current v en/uvlo = 0.2v v en/uvlo = 1.1v sleep mode (switch off) active mode (switch on) 0.8 215 100 350 2 a a a a en/uvlo shutdown threshold for lowest off i q l 0.2 0.55 v en/uvlo enable threshold falling hysteresis 1.204 1.228 0.014 1.248 v v i hys en/uvlo hysteresis current v en/uvlo = 0.2v v en/uvlo = 1.1v v en/uvlo = 1.3v C0.1 2.2 C0.1 0 2.5 0 0.1 2.8 0.1 a a a f min minimum switching frequency 9.4 10 10.6 khz t on(min) minimum switch-on time 170 ns t off(max) maximum switch-off time backup timer 190 s i sw(max) maximum sw current limit l 1.200 1.375 1.550 a i sw(min) minimum sw current limit l 0.22 0.29 0.36 a r ds(on) switch on-resistance i sw = 500ma 0.4 i lkg switch leakage current v in = 42v, v sw = 65v 0.1 0.5 a i rfb r fb regulation current l 97.5 100 102.5 a r fb regulation current line regulation 2.7v v in 42v 0.02 0.1 %/v the lt8301i is guaranteed over the full C40c to 125c operating junction temperature range. the lt8301h is guaranteed over the full C40c to 150c operating junction temperature range. the lt8301mp is guaranteed over the full C55c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperature greater than 125c. note 4: the lt8301 includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 150c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. lt8301 8301f for more information www.linear.com/lt8301
4 typical performance characteristics boundary mode waveforms discontinuous mode waveforms burst mode waveforms v in shutdown current v in quiescent current, sleep mode v in quiescent current, active mode output load and line regulation output short-circuit protection switching frequency vs load current t a = 25c, unless otherwise noted. load current (a) 0 350 300 250 200 150 100 50 0 0.6 1.0 8301 g03 0.2 0.4 0.8 1.2 switching frequency (khz) v in = 5v v in = 12v v in = 24v v in = 36v front page application v in (v) 0 0 i q (a) 2 6 8 10 10 20 25 45 8301 g07 4 5 15 30 35 40 t j = 150c t j = 25c t j = ?55c v in (v) 0 i q (a) 100 110 120 40 8301 g08 90 80 60 10 20 30 5 45 15 25 35 70 140 130 t j = 150c t j = 25c t j = ?55c v in (v) 0 i q (a) 320 340 360 40 8301 g09 300 280 10 20 30 5 45 15 25 35 400 380 t j = 150c t j = 25c t j = ?55c load current (a) 0 output voltage (v) 5.00 8301 g01 4.90 4.80 0.4 0.8 0.2 0.6 1.0 5.10 5.20 front page application 4.95 4.85 5.05 5.15 1.2 v in = 5v v in = 12v v in = 24v v in = 36v load current (a) 0 0 output voltage (v) 1 2 3 4 0.4 0.8 1.2 1.6 8301 g02 5 6 0.2 0.6 1.0 1.4 v in = 5v v in = 12v v in = 24v v in = 36v front page application v out 50mv/div v sw 20v/div 5s/div front page application v in = 12v i load = 600ma 8301 g04 v out 50mv/div v sw 20v/div 5s/div front page application v in = 12v i load = 200ma 8301 g05 v out 50mv/div v sw 20v/div 20s/div front page application v in = 12v i load = 6ma 8301 g06 lt8301 8301f for more information www.linear.com/lt8301
5 typical performance characteristics r ds(on) switch current limit maximum switching frequency minimum switching frequency minimum switch-on time minimum switch-off time en/uvlo enable threshold en/uvlo hysteresis current r fb regulation current t a = 25c, unless otherwise noted. temperature (c) v en/uvlo (v) 1.245 1.210 1.215 1.230 1.235 1.240 1.220 1.225 1.205 8301 g10 150 7550 125100 250?25?50 temperature (c) i hys (a) 5 1 2 3 4 0 8301 g11 150 7550 125100 250?25?50 temperature (c) i rfb (a) 105 101 102 103 104 100 96 97 98 99 95 8301 g12 150 7550 125100 250?25?50 temperature (c) resistance (m) 1000 200 400 600 800 0 8301 g13 150 7550 125100 250?25?50 temperature (c) ?50 i sw (a) 0.8 1.2 150 8301 g14 0.4 0 0 50 100 ?25 25 75 125 1.6 0.6 1.0 0.2 1.4 maximum current limit minimum current limit temperature (c) ?50 0 frequency (khz) 100 200 300 400 0 50 100 150 8301 g15 500 600 ?25 25 75 125 temperature (c) ?50 0 frequency (khz) 5 10 15 20 ?25 0 25 50 8301 g16 75 100 125 150 temperature (c) time (ns) 500 100 200 300 400 0 8301 g17 150 7550 125100 250?25?50 temperature (c) time (ns) 500 100 200 300 400 0 8301 g18 150 7550 125100 250?25?50 lt8301 8301f for more information www.linear.com/lt8301
6 pin functions en/uvlo (pin 1): enable/undervoltage lockout. the en/uvlo pin is used to enable the lt8301. pull the pin below 0.2v to shut down the l t8301. this pin has an ac - curate 1.228v threshold and can be used to program a v in undervoltage lockout (uvlo) threshold using a resistor divider from v in to ground. a 2.5a current hysteresis allows the programming of v in uvlo hysteresis. if neither function is used, tie this pin directly to v in . gnd (pin 2): ground. tie this pin directly to local ground plane. r fb (pin 3): input pin for external feedback resistor. con - nect a resistor from this pin to the transformer primary sw pin. the ratio of the r fb resistor to an internal 10k resistor, times a trimmed 1.0v reference voltage, deter - mines the output voltage (plus the effect of any non-unity transformer turns ratio). minimize trace area at this pin. sw (pin 4): drain of the 65v internal dmos power switch. minimize trace area at this pin to reduce emi and voltage spikes. v in (pin 5): input supply. the v in pin supplies current to internal circuitry and serves as a reference voltage for the feedback circuitry connected to the r fb pin. locally bypass this pin to ground with a capacitor. lt8301 8301f for more information www.linear.com/lt8301
7 block diagram 8301 bd ? + ? + oscillator 1:4 s r q 1.0v 25a m2 m3 boundary detector driver ? + a2 a3 r sense m1 g m r ref 10k r fb 2.5a r2 en/uvlo m4 3 4 5 ? + 1.228v a1 1 reference regulators v in 2 gnd r fb sw v in v in t1 n ps :1 d out l sec l pri v out + v out ? c out c in r1 operation the lt8301 is a current mode switching regulator ic de - signed specially for the isolated flyback topology. the key problem in isolated topologies is how to communicate the output voltage information from the isolated secondar y side of the transformer to the primar y side for regulation. historically, opto-isolators or extra transformer windings communicate this information across the isolation bound - ary. opto-isolator circuits waste output power, and the extra components increase the cost and physical size of the power supply. opto-isolators can also cause system issues due to limited dynamic response, nonlinearity , unit- to-unit variation and aging over lifetime. circuits employing extra transformer windings also exhibit deficiencies, as using an extra winding adds to the transformers physical size and cost, and dynamic response is often mediocre. the lt8301 samples the isolated output voltage through the primary-side flyback pulse waveform. in this manner, neither opto-isolator nor extra transformer winding is re - quired for regulation. since the lt8301 operates in either boundar y conduction mode or discontinuous conduction mode, the output voltage is always sampled on the sw pin when the secondary current is zero. this method im - proves load regulation without the need of external load compensation components. lt8301 8301f for more information www.linear.com/lt8301
8 operation the lt8301 is a simple to use micropower isolated flyback converter housed in a 5-lead tsot-23 package. the output voltage is programmed with a single external resistor. by integrating the loop compensation and soft-start inside, the part further reduces the number of external components. as shown in the block diagram, many of the blocks are similar to those found in traditional switching regulators including reference, regulators, oscillator, logic, current amplifier, current comparator, driver, and power switch. the novel sections include a flyback pulse sense circuit, a sample-and-hold error amplifier, and a boundary mode detector, as well as the additional logic for boundary conduction mode, discontinuous conduction mode, and low ripple burst mode operation. boundary conduction mode operation the lt8301 features boundary conduction mode operation at heavy load, where the chip turns on the primary power switch when the secondary current is zero. boundary conduction mode is a variable frequency, variable peak- current switching scheme. the power switch turns on and the transformer primary current increases until an internally controlled peak current limit. after the power switch turns off, the voltage on the sw pin rises to the output voltage multiplied by the primary-to-secondary transformer turns ratio plus the input voltage. when the secondary current through the output diode falls to zero, the sw pin voltage collapses and rings around v in . a boundary mode detector senses this event and turns the power switch back on. boundary conduction mode returns the secondary current to zero every cycle, so parasitic resistive voltage drops do not cause load regulation errors. boundary conduc - tion mode also allows the use of smaller transformers compared to continuous conduction mode and does not exhibit sub-harmonic oscillation. discontinuous conduction mode operation as the load gets lighter, boundar y conduction mode in - creases the switching frequency and decreases the switch peak current at the same ratio. running at a higher switching frequency up to several mhz increases switching and gate charge losses. t o avoid this scenario, the lt8301 has an additional internal oscillator, which clamps the maximum switching frequency to be less than 430khz (typ). once the switching frequency hits the internal frequency clamp, the part starts to delay the switch turn-on and operates in discontinuous conduction mode. low ripple burst mode operation unlike traditional flyback converters, the lt8301 has to turn on and off at least for a minimum amount of time and with a minimum frequency to allow accurate sampling of the output voltage. the inherent minimum switch cur - rent limit and minimum switch-off time are necessary to guarantee the correct operation of specific applications. as the load gets ver y light, the l t8301 starts to fold back the switching frequency while keeping the minimum switch current limit. so the load current is able to decrease while still allowing minimum switch-off time for the sample- and-hold error amplifier. meanwhile, the part switches between sleep mode and active mode, thereby reducing the effective quiescent current to improve light load efficiency. in this condition, the lt8301 operates in low ripple burst mode. the 10khz (typ) minimum switching frequency determines how often the output voltage is sampled and also the minimum load requirement. lt8301 8301f for more information www.linear.com/lt8301
9 output voltage the r fb resistor as depicted in the block diagram is the only external resistor used to program the output voltage. the lt8301 operates similar to traditional current mode switchers, except in the use of a unique flyback pulse sense circuit and a sample-and-hold error amplifier, which sample and therefore regulate the isolated output voltage from the flyback pulse. operation is as follows: when the power switch m1 turns off, the sw pin voltage rises above the v in supply. the amplitude of the flyback pulse, i.e., the difference between the sw pin voltage and v in supply, is given as: v flbk = (v out + v f + i sec ? esr) ? n ps v f = output diode forward voltage i sec = transformer secondary current esr = total impedance of secondar y circuit n ps = transformer effective primary-to-secondary turns ratio the flyback voltage is then converted to a current i rfb by the flyback pulse sense circuit (m2 and m3). this current i rfb also flows through the internal 10k r ref resistor to generate a ground-referred voltage. the resulting volt - age feeds to the inverting input of the sample-and-hold error amplifier . since the sample-and-hold error amplifier samples the voltage when the secondar y current is zero, the (i sec ? esr) term in the v flbk equation can be as - sumed to be zero. an internal trimmed reference voltage,v iref 1.0v, feeds to the non-inverting input of the sample-and-hold error amplifier. the relatively high gain in the overall loop causes the voltage across r ref resistor to be nearly equal to v iref . applications information the resulting relationship between v flbk and v iref can be expressed as: v flbk r fb ? ? ? ? ? ? ?r ref = v iref or v flbk = v iref r ref ? ? ? ? ? ? ?r fb = i rfb ?r fb v iref = internal trimmed reference voltage i rfb = r fb regulation current = 100a combination with the previous v flbk equation yields an equation for v out , in terms of the r fb resistor, transformer turns ratio, and diode forward voltage: v out = 100a ? r fb n ps ? ? ? ? ? ? ? v f output temperature coefficient the first term in the v out equation does not have tempera - ture dependence, but the output diode forward voltage v f has a significant negative temperature coefficient (C1mv/c to C2mv/c). such a negative temperature coefficient pro - duces approximately 200mv to 300mv voltage variation on the output voltage across temperature. for higher voltage outputs, such as 12v and 24v , the output diode temperature coefficient has a negligible effect on the output voltage regulation. for lower voltage outputs, such as 3.3v and 5v, however, the output diode temperature coefficient does count for an extra 2% to 5% output voltage regulation. for customers requiring tight output voltage regulation across temperature, please refer to other ltc parts with integrated temperature compensation features. lt8301 8301f for more information www.linear.com/lt8301
10 applications information selecting actual r fb resistor value the lt8301 uses a unique sampling scheme to regulate the isolated output voltage. due to the sampling nature, the scheme contains repeatable delays and error sources, which will affect the output voltage and force a re-evaluation of the r fb resistor value. therefore, a simple two-step process is required to choose feedback resistor r fb . rearrangement of the expression for v out in the output voltage section yields the starting value for r fb : r fb = n ps ? v out + v f ( ) 100a v out = output voltage v f = output diode forward voltage = ~0.3v n ps = transformer effective primary-to-secondary turns ratio power up the application with the starting r fb value and other components connected, and measure the regulated output voltage, v out(meas) . the final r fb value can be adjusted to: r fb(final) = v out v out(meas) ?r fb once the final r fb value is selected, the regulation accuracy from board to board for a given application will be very consistent, typically under 5% when including device variation of all the components in the system (assuming resistor tolerances and transformer windings matching within 1%). however, if the transformer or the output diode is changed, or the layout is dramatically altered, there may be some change in v out . output power a flyback converter has a complicated relationship between the input and output currents compared to a buck or a boost converter. a boost converter has a relatively constant maximum input current regardless of input voltage and a buck converter has a relatively constant maximum output current regardless of input voltage. this is due to the continuous non-switching behavior of the two currents. a flyback converter has both discontinuous input and output currents which make it similar to a non-isolated buck-boost converter. the duty cycle will affect the input and output currents, making it hard to predict output power. in ad - dition, the winding ratio can be changed to multiply the output current at the expense of a higher switch voltage. the graphs in figures 1 to 4 show the typical maximum output power possible for the output voltages 3.3v , 5v , 12v, and 24v. the maximum output power curve is the calculated output power if the switch voltage is 50v dur - ing the switch-off time. 15v of margin is left for leakage inductance voltage spike. to achieve this power level at a given input, a winding ratio value must be calculated to stress the switch to 50v , resulting in some odd ratio values. the curves below the maximum output power curve are examples of common winding ratio values and the amount of output power at given input voltages. one design example would be a 5v output converter with a minimum input voltage of 8v and a maximum input volt - age of 32v. a three-to-one winding ratio fits this design example perfectly and outputs equal to 5.42w at 32v but lowers to 2.71w at 8v . the following equations calculate output power: ? p out = ? v in ?d ?i sw(max) ? 0.5 = efficiency = ? 85% d = dutycycle = v out + v f ( ) ?n ps v out + v f ( ) ?n ps + v in i sw(max) = maximum switch current limit = 1.2a (min) lt8301 8301f for more information www.linear.com/lt8301
11 applications information figure 4. output power for 24v output figure 1. output power for 3.3v output figure 2. output power for 5v output figure 3. output power for 12v output input voltage (v) 0 4 5 7 n = 5:1 n = 3:1 n = 2:1 30 8301 f01 3 2 10 20 40 1 0 6 output power (w) maximum output current n = 1:1 input voltage (v) 0 4 5 7 n = 4:1 n = 3:1 n = 2:1 30 8301 f02 3 2 10 20 40 1 0 6 output power (w) maximum output current n = 1:1 input voltage (v) 0 4 5 7 n = 3:2 n = 1:1 n = 2:3 30 8301 f03 3 2 10 20 40 1 0 6 output power (w) maximum output current n = 1:3 input voltage (v) 0 4 5 7 n = 4:5 n = 1:2 n = 1:3 30 8301 f04 3 2 10 20 40 1 0 6 output power (w) maximum output current n = 1:5 primary inductance requirement the lt8301 obtains output voltage information from the reflected output voltage on the sw pin. the conduction of secondary current reflects the output voltage on the primary sw pin. the sample-and-hold error amplifier needs a minimum 450ns to settle and sample the reflected output voltage. in order to ensure proper sampling, the second - ary winding needs to conduct current for a minimum of 450ns. the following equation gives the minimum value for primar y-side magnetizing inductance: l pri t off(min) ?n ps ? v out + v f ( ) i sw(min) t off(min) = minimum switch-off time = 450ns i sw(min) = minimum switch current limit = 290ma (typ) in addition to the primary inductance requirement for the minimum switch-off time, the lt8301 has minimum switch-on time that prevents the chip from turning on the power switch shorter than approximately 170ns. this minimum switch-on time is mainly for leading-edge blank - ing the initial switch turn-on current spike. if the inductor current exceeds the desired current limit during that time, oscillation may occur at the output as the current control loop will lose its ability to regulate. therefore, the following equation relating to maximum input voltage must also be followed in selecting primary-side magnetizing inductance: l pri t on(min) ? v in(max) i sw(min) t on(min) = minimum switch-on time = 170ns lt8301 8301f for more information www.linear.com/lt8301
12 applications information in general, choose a transformer with its primary mag - netizing inductance about 30% larger than the minimum values calculated above. a transformer with much larger inductance will have a bigger physical size and may cause instability at light load. selecting a transformer transformer specification and design is perhaps the most critical part of successfully applying the lt8301. in addition to the usual list of guidelines dealing with high frequency isolated power supply transformer design, the following information should be carefully considered. linear technology has worked with several leading mag - netic component manufacturers to produce pre-designed flyback transformers for use with the lt8301. t able 1 shows the details of these transformers. turns ratio note that when choosing the r fb resistor to set output voltage, the user has relative freedom in selecting a trans - former turns ratio to suit a given application. in contrast, the use of simple ratios of small integers, e.g., 3:1, 2:1, 1:1, provides more freedom in settling total turns and mutual inductance. table 1. predesigned transformerstypical specifications transformer part number dimensions (w l h) (mm) l pri (h) l lkg (h) np:ns r pri (m) r sec (m) vendor target applications v in (v) v out (v) i out (a) 750313973 15.24 13.34 11.43 40 1 4:1 80 40 wrth electronik 8 to 36 3.3 0.80 750370047 13.35 10.8 9.14 30 1 3:1:1 60 12.5 wrth electronik 8 to 32 5 0.55 750313974 15.24 13.34 11.43 40 1 3:1 80 50 wrth electronik 8 to 36 5 0.55 750313970 15.24 13.34 11.43 40 1 2:1 80 70 wrth electronik 18 to 42 3.3 0.75 750310799 9.14 9.78 10.54 25 0.125 1:1:0.33 60 74 wrth electronik 8 to 30 12 0.22 750313972 15.24 13.34 11.43 40 1 1:1 80 185 wrth electronik 18 to 42 5 0.42 750313975 15.24 13.34 11.43 40 1 1:2 110 865 wrth electronik 8 to 36 24 0.12 750313976 15.24 13.34 11.43 40 1 1:4 110 2300 wrth electronik 8 to 32 48 0.05 12387-t036 15.5 12.5 11.5 40 2 4:1 160 25 sumida 8 to 36 3.3 0.80 12387-t037 15.5 12.5 11.5 40 2 3:1 210 30 sumida 8 to 36 5 0.55 12387-t040 15.5 12.5 11.5 40 1.5 2:1 210 50 sumida 18 to 42 3.3 0.75 12387-t041 15.5 12.5 11.5 40 1.5 1:1 210 200 sumida 18 to 42 5 0.42 12387-t038 15.5 12.5 11.5 40 2 1:2 220 460 sumida 8 to 36 24 0.12 12387-t039 15.5 12.5 11.5 40 2 1:4 220 2200 sumida 8 to 32 48 0.05 pa3948.003nl 15.24 13.08 11.45 40 1.45 4:1 210 26 pulse engineering 8 to 36 3.3 0.80 pa3948.004nl 15.24 13.08 11.45 40 1.95 3:1 220 29 pulse engineering 8 to 36 5 0.55 pa3948.001nl 15.24 13.08 11.45 40 1.45 2:1 410 70 pulse engineering 18 to 42 3.3 0.75 pa3948.002nl 15.24 13.08 11.45 40 1.45 1:1 405 235 pulse engineering 18 to 42 5 0.42 pa3948.005nl 15.24 13.08 11.45 40 1.60 1:2 220 1275 pulse engineering 8 to 36 24 0.12 pa3948.006nl 15.24 13.08 11.45 40 1.65 1:4 220 3350 pulse engineering 8 to 32 48 0.05 lt8301 8301f for more information www.linear.com/lt8301
13 typically, choose the transformer turns ratio to maximize available output power. for low output voltages (3.3v or 5v), a larger n:1 turns ratio can be used with multiple primary windings relative to the secondary to maximize the transformers current gain (and output power). however, remember that the sw pin sees a voltage that is equal to the maximum input supply voltage plus the output voltage multiplied by the turns ratio. in addition, leakage inductance will cause a voltage spike (v leakage ) on top of this reflected voltage. this total quantity needs to remain below the 65v absolute maximum rating of the sw pin to prevent breakdown of the internal power switch. together these conditions place an upper limit on the turns ratio, n ps , for a given application. choose a turns ratio low enough to ensure: n ps < 65v ? v in(max) ? v leakage v out + v f for lower output power levels, choose a smaller n:1 turns ratio to alleviate the sw pin voltage stress. although a 1:n turns ratio makes it possible to have very high output voltages without exceeding the breakdown voltage of the internal power switch, the multiplied parasitic capacitance through turns ratio may cause the switch turn-on current spike ringing beyond 170ns leading-edge blanking, thereby producing light load instability in certain applications. so any 1:n turns ratio should be fully evaluated before its use with the lt8301. the turns ratio is an important element in the isolated feedback scheme, and directly affects the output voltage accuracy. make sure the transformer manufacturer speci - fies turns ratio accuracy within 1%. applications information saturation current the current in the transformer windings should not exceed its rated saturation current. energy injected once the core is saturated will not be transferred to the secondary and will instead be dissipated in the core. when designing custom transformers to be used with the lt8301, the saturation current should always be specified by the transformer manufacturers. winding resistance resistance in either the primary or secondary windings will reduce overall power efficiency. good output voltage regulation will be maintained independent of winding re - sistance due to the boundary/discontinuous conduction mode operation of the lt8301. leakage inductance and snubbers t ransformer leakage inductance on either the primary or secondary causes a voltage spike to appear on the primary after the power switch turns off. this spike is increasingly prominent at higher load currents where more stored en - ergy must be dissipated. it is very important to minimize transformer leakage inductance. when designing an application, adequate margin should be kept for the worst-case leakage voltage spikes even under overload conditions. in most cases shown in fig - ure?5, the reflected output voltage on the primary plus v in should be kept below 50v. this leaves at least 15v margin for the leakage spike across line and load conditions. a larger voltage margin will be required for poorly wound transformers or for excessive leakage inductance. in addition to the voltage spikes, the leakage inductance also causes the sw pin ringing for a while after the power switch turns off. to prevent the voltage ringing falsely trig - gering the boundary mode detector, the lt8301 internally blanks the boundar y mode detector for approximately 350ns. any remaining voltage ringing after 350ns may turn the power switch back on again before the second - ar y current falls to zero. so the leakage inductance spike ringing should be limited to less than 350ns. lt8301 8301f for more information www.linear.com/lt8301
14 applications information a snubber circuit is recommended for most applications. two types of snubber circuits shown in figure 6 that can protect the internal power switch include the dz (diode- zener) snubber and the rc (resistor-capacitor) snubber. the dz snubber ensures well defined and consistent clamping voltage and has slightly higher power efficiency, while the rc snubber quickly damps the voltage spike ringing and provides better load regulation and emi performance. figure 5 shows the flyback waveforms with the dz and rc snubbers. for the dz snubber, proper care must be taken when choosing both the diode and the zener diode. schottky diodes are typically the best choice, but some pn diodes can be used if they turn on fast enough to limit the leak - age inductance spike. choose a diode that has a reverse- voltage rating higher than the maximum sw pin voltage. the zener diode breakdown voltage should be chosen to balance power loss and switch voltage protection. the best compromise is to choose the largest voltage breakdown. use the following equation to make the proper choice: v zener(max) 65v C v in(max) for an application with a maximum input voltage of 32v, choose a 20v zener diode, the v zener(max) of which is around 21v and below the 33v maximum. the power loss in the clamp will determine the power rat - ing of the zener diode. power loss in the clamp is highest at maximum load and minimum input voltage. the switch current is highest at this point along with the energy stored in the leakage inductance. a 0.25w zener will satisfy most applications when the highest v zener is chosen. figure 5. maximum voltages for sw pin flyback waveform figure 6. snubber circuits 8301 f05 v sw t off > 450ns v leakage t sp < 350ns v sw v sw time no snubber with dz snubber with rc snubber t off > 450ns v leakage t sp < 350ns time t off > 450ns v leakage t sp < 350ns time <65v <50v <65v <50v <65v <50v 8301 f06b 8300 f06a dz snubber rc snubber l ? z d c r l ? lt8301 8301f for more information www.linear.com/lt8301
15 applications information tables 2 and 3 show some recommended diodes and zener diodes. table 2. recommended zener diodes part v zener (v) power (w) case vendor cmdz5248b 18 0.25 sod-323 central semiconductor cmdz5250b 20 0.25 sod-323 table 3. recommended diodes part i max (a) v reverse (v) case vendor cmhd4448 0.25 100 sod-123 central semiconductor dfls1100 1 100 powerdi-123 diodes inc. dfls1150 1 150 powerdi-123 diodes inc. the recommended approach for designing an rc snubber is to measure the period of the ringing on the sw pin when the power switch turns off without the snubber and then add capacitance (starting with 100pf) until the period of the ringing is 1.5 to 2 times longer. the change in period will determine the value of the parasitic capacitance, from which the parasitic inductance can be determined from the initial period, as well. once the value of the sw node capacitance and inductance is known, a series resistor can be added to the snubber capacitance to dissipate power and critically dampen the ringing. the equation for deriving the optimal series resistance using the observed periods ( t period and t period(snubbed) ) and snubber capacitance (c snubber ) is: c par = c snubber t period(snubbed) t period ? ? ? ? ? ? 2 ? 1 l par = t period 2 c par ? 4 2 r snubber = l par c par figure 7. undervoltage lockout (uvlo) lt8301 gnd en/uvlo r1 run/stop control (optional) r2 v in 8301 f07 note that energy absorbed by the rc snubber will be converted to heat and will not be delivered to the load. in high voltage or high current applications, the snubber may need to be sized for thermal dissipation. undervoltage lockout (uvlo) a resistive divider from v in to the en/uvlo pin imple - ments undervoltage lockout (uvlo). the en/uvlo pin falling threshold is set at 1.228v with 14mv hysteresis. in addition, the en/uvlo pin sinks 2.5a when the volt - age at the pin is below 1.228v. this current provides user programmable hysteresis based on the value of r1. the programmable uvlo thresholds are: v in(uvlo + ) = 1.242v ?(r1 + r2) r2 + 2.5a ?r1 v in(uvlo ? ) = 1.228v ?(r1 + r2) r2 figure 7 shows the implementation of external shutdown control while still using the uvlo function. the nmos grounds the en/uvlo pin when turned on, and puts the lt8301 in shutdown with quiescent current less than 2a. lt8301 8301f for more information www.linear.com/lt8301
16 minimum load requirement the lt8301 samples the isolated output voltage from the primary-side flyback pulse waveform. the flyback pulse occurs once the primary switch turns off and the secondary winding conducts current. in order to sample the output voltage, the lt8301 has to turn on and off at least for a minimum amount of time and with a minimum frequency. the lt8301 delivers a minimum amount of energy even during light load conditions to ensure accurate output volt - age information. the minimum energy delivery creates a minimum load requirement, which can be approximately estimated as: i load(min) = l pri ?i sw(min) 2 ? f min 2 ? v out l pri = transformer primary inductance i sw(min) = minimum switch current limit = 360ma (max) f min = minimum switching frequency = 10.6khz (max) the lt8301 typically needs less than 0.5% of its full output power as minimum load. alternatively, a zener diode with its breakdown of 20% higher than the output voltage can serve as a minimum load if pre-loading is not acceptable. for a 5v output, use a 6v zener with cathode connected to the output. output short-circuit protection when the output is heavily overloaded or shorted, the reflected sw pin waveform rings longer than the internal blanking time. if no protection scheme is applied, after the 450ns minimum switch-off time, the excessive ring might falsely trigger the boundary mode detector and turn the power switch back on again before the secondary current falls to zero. the part then runs into continuous conduction mode at maximum switching frequency, and the switch current may run away. to prevent the switch current from running away under this condition, the lt8301 gradually folds back both maximum switch current limit and switch - ing frequency as the output voltage drops from regulation. as a result, the switch current remains below 1.375a (typ) maximum switch current limit. in the worst-case scenario where the output is directly shorted to ground through a long wire and the huge ring after folding back still falsely applications information triggers the boundary mode detector, a secondary overcur - rent protection ensures that the lt8301 can still function properly . once the switch current hits 2.2a overcurrent limit, a soft-start cycle initiates and throttles back both switch current limit and switching frequency very hard. this output short protection prevents the switch current from running away and limits the average output diode current. design example use the following design example as a guide to design applications for the lt8301. the design example involves designing a 5v output with a 500ma load current and an input range from 8v to 32v. v in(min) = 8v, v in(nom) = 12v, v in(max) = 32v, v out = 5v, i out = 500ma step 1: select the transformer turns ratio. n ps < 65v ? v in(max) ? v leakage v out + v f v leakage = margin for transformer leakage spike = 15v v f = output diode forward voltage = ~0.3v example: n ps < 65v ? 32v ? 15v 5v + 0.3v = 3.4 the choice of transformer turns ratio is critical in deter - mining output current capability of the converter. table 4 shows the switch voltage stress and output current capa - bility at different transformer turns ratio. table 4. switch voltage stress and output current capability vs turns ratio n ps v sw(max) at v in(max) (v) i out(max) at v in(min) (ma) duty cycle (%) 1:1 37.3 330 14-40 2:1 42.6 470 25-57 3:1 47.9 540 33-67 since only n ps = 3 can meet the 500ma output current requirement, n ps = 3 is chosen in this example. lt8301 8301f for more information www.linear.com/lt8301
17 applications information step 2: determine the primary inductance. primary inductance for the transformer must be set above a minimum value to satisfy the minimum switch-off and switch-on time requirements: l pri t off(min) ?n ps ? v out + v f ( ) i sw(min) l pri t on(min) ? v in(max) i sw(min) t off(min) = 450ns t on(min) = 170ns i sw(min) = 290ma (typ) example: l pri 450ns ? 3 ?(5v + 0.3v) 290ma = 25h l pri 170ns ? 32v 290ma = 19h most transformers specify primary inductance with a tolerance of 20%. with other component tolerance con - sidered, choose a transformer with its primary inductance 30% larger than the minimum values calculated above. l pri = 40h is then chosen in this example. once the primary inductance has been determined, the maximum load switching frequency can be calculated as: f sw = 1 t on + t off = 1 l pri ?i sw v in + l pri ?i sw n ps ?(v out + v f ) i sw = v out ?i out ? 2 ? v in ?d example: d = (5v + 0.3v)? 3 (5v + 0.3v)? 3 + 12v = 0.57 i sw = 5v ? 0.5a ? 2 0.85 ?12v ? 0.57 = 0.86a f sw = 199khz the transformer also needs to be rated for the correct saturation current level across line and load conditions. a saturation current rating larger than 2a is necessary to work with the lt8301. the 750313974 from wrth is chosen as the flyback transformer. step 3: choose the output diode. two main criteria for choosing the output diode include forward current rating and reverse voltage rating. the maximum load requirement is a good first-order guess as the average current requirement for the output diode. a conservative metric is the maximum switch current limit multiplied by the turns ratio, i diode(max) = i sw(max) ? n ps example: i diode(max) = 4.125a next calculate reverse voltage requirement using maxi - mum v in : v reverse = v out + v in(max) n ps example: v reverse = 5v + 32v 3 = 15.6v the cmsh5-20 (5a, 20v diode) from central semicon - ductor is chosen. lt8301 8301f for more information www.linear.com/lt8301
18 step 4: choose the output capacitor. the output capacitor should be chosen to minimize the output voltage ripple while considering the increase in size and cost of a larger capacitor. use the equation below to calculate the output capacitance: c out = l pri ?i sw 2 2 ? v out ? ? v out example: design for output voltage ripple less than 1% of v out , i.e., 50mv. c out = 40h ?(0.86a) 2 2 ? 5v ? 0.05v = 60f remember ceramic capacitors lose capacitance with ap - plied voltage. the capacitance can drop to 40% of quoted capacitance at the maximum voltage rating. so a 100f , 10v rating ceramic capacitor is chosen. step 5: design snubber circuit. t he snubber circuit protects the power switch from leakage inductance voltage spike. a dz snubber is recommended for this application because of lower leakage inductance and larger voltage margin. the zener and the diode need to be selected. the maximum zener breakdown voltage is set according to the maximum v in : v zener(max) 65v C v in(max) example: v zener(max) 65v C 32v = 33v applications information a 20v zener with a maximum of 21v will provide optimal protection and minimize power loss. so a 20v, 0.25w zener from central semiconductor (cmdz5250b) is chosen. choose a diode that is fast and has sufficient reverse voltage breakdown: v reverse > v sw(max) v sw(max) = v in(max) + v zener(max) example: v reverse > 53v a 100v, 0.25a diode from central semiconductor (cmhd4448) is chosen. step 6: select the r fb resistor. use the following equation to calculate the starting value for r fb : r fb = n ps ?(v out + v f ) 100a example: r fb = 3 ?(5v + 0.3v) 100a = 159k depending on the tolerance of standard resistor values, the precise resistor value may not exist. for 1% standard values, a 158k resistor should be close enough. as dis - cussed in the application information section, the final r fb value should be adjusted on the measured output voltage. lt8301 8301f for more information www.linear.com/lt8301
19 applications information step 7: select the en/uvlo resistors. determine the amount of hysteresis required and calculate r1 resistor value: v in(hys) = 2.5a ? r1 example: choose 2v of hysteresis, r1 = 806k determine the uvlo thresholds and calculate r2 resistor value: v in(uvlo + ) = 1.242v ?(r1 + r2) r2 + 2.5a ?r1 example: set v in uvlo rising threshold to 7.5v, r2 = 232k v in(uvlo+) = 7.5v v in(uvloC) = 5.5v step 8: ensure minimum load. the theoretical minimum load can be approximately estimated as: i load(min) = 40h ?(360ma) 2 ?10.6khz 2 ? 5v = 5.5ma remember to check the minimum load requirement in real application. the minimum load occurs at the point where the output voltage begins to climb up as the con - verter delivers more energy than what is consumed at the output. the real minimum load for this application is about 6ma. in this example, a 820 resistor is selected as the minimum load. lt8301 8301f for more information www.linear.com/lt8301
20 typical applications 2.7v to 36v in /15v out micropower isolated flyback converter 8v to 36v in /3.3v out micropower isolated flyback converter efficiency vs load curent lt8301 t1 1:1 d2 z1 d1 r fb sw 40h 40h d1: central cmhd4448 d2: central cmmr1u-02 t1: sumida 12387-t041 z1: central cmdz5248b en/uvlo 10f v in v in 2.7v to 36v v out + 15v 2ma to 130ma (v in = 5v) 2ma to 230ma (v in = 12v) 2ma to 320ma (v in = 24v) 2ma to 370ma (v in = 36v) v out ? gnd 150k 10f 8301 ta02a load current (ma) 0 65 efficiency (%) 70 75 80 85 90 95 100 200 300 400 8301 ta02b v in = 5v v in = 12v v in = 24v v in = 36v lt8301 t1 4:1 d2 z1 d1 r fb sw 40h 2.5h d1: central cmhd4448 d2: nxp pmeg2020eh t1: sumida 12387-t036 z1: central cmdz5250b en/uvlo 806k 4.7f v in v in 8v to 36v v out + 3.3v 8.5ma to 0.95a (v in = 12v) 8.5ma to 1.30a (v in = 24v) 8.5ma to 1.50a (v in = 36v) v out ? gnd 137k 232k 47f 8301 ta03 lt8301 8301f for more information www.linear.com/lt8301
21 typical applications 8v to 36v in /24v out micropower isolated flyback converter 8v to 36v in /48v out micropower isolated flyback converter efficiency vs load curent lt8301 t1 1:2 d2 d1 z1 r fb sw 40h 160h d1: central cmhd4448 d2: st stps1150a t1: wrth 750313975 z1: central cmdz5248b en/uvlo 806k 4.7f v in v in 8v to 36v v out + 24v 1.2ma to 130ma (v in = 12v) 1.2ma to 180ma (v in = 24v) 1.2ma to 200ma (v in = 36v) v out ? gnd 121k 232k 4.7f 8301 ta04a load current (ma) 0 65 efficiency (%) 70 75 80 85 90 95 50 100 150 200 8301 ta04b v in = 12v v in = 24v v in = 36v lt8301 t1 1:4 d2 z1 d1 r fb sw 40h 640h d1: central cmhd4448 d2: diodes bav21w-7-f t1: wrth 750313976 z1: central cmdz5252b en/uvlo 806k 4.7f v in v in 8v to 36v v out + 48v 0.6ma to 70ma (v in = 12v) 0.6ma to 90ma (v in = 24v) 0.6ma to 100ma (v in = 36v) v out ? gnd 118k 232k 1f 8301 ta03 lt8301 8301f for more information www.linear.com/lt8301
22 typical applications v in to (v in + 10v)/(v in C 10v) micropower converter 12v to 24v in /four 15v out micropower isolated flyback converter lt8301 d1 d2 t1 1:1:1:1:1 z1 r fb sw 30h 30h en/uvlo 806k 4.7f 232k v in v in 12v to 24v gnd 150k d1: central cmhd4448 d2-d5: central cmmr1u-02 t1: sumida eph2815-adbn-a0349 z1: central cmdz5248b 7.5k v out1 + 15v 60ma v out1 ? 8301 ta07 2.2f d3 30h 7.5k v out2 + 15v 60ma v out2 ? 2.2f d4 30h 7.5k v out3 + 15v 60ma v out3 ? 2.2f d5 30h 7.5k v out4 + 15v 60ma v out4 ? 2.2f lt8301 z1 r fb sw en/uvlo 10f v in t1 1:1 v in 2.7v to 42v v in + 10v 150ma v in ? 10v v in 150ma gnd 102k 40h 40h d1, d2: diodes inc. dfls160 t1: sumida 12387-t041 z1: central cmdz12l d1 d2 4.7f 4.7f 8301 ta06 z2 lt8301 8301f for more information www.linear.com/lt8301
23 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635 rev b) 1.50 ? 1.75 (note 4) 2.80 bsc 0.30 ? 0.45 typ 5 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) s5 tsot-23 0302 rev b pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. lt8301 8301f for more information www.linear.com/lt8301
24 ? linear technology corporation 2014 lt 0214 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt8301 related parts typical application part number description comments lt8300 100v in micropower isolated flyback converter with 150v/260ma switch low i q monolithic no-opto flybacks, 5-lead tsot-23 lt8302 42v in micropower isolated flyback converter with 65v/3.6a switch low i q monolithic no-opto flybacks, 8-lead so-8e lt8309 secondary-side synchronous rectifier driver 4.5v v cc 40v, fast turn-on and turn-off, 5-lead tsot-23 lt3511/lt3512 100v isolated flyback converters monolithic no-opto flybacks with integrated 240ma/420ma switch, msop-16(12) lt3748 100v isolated flyback controller 5v v in 100v, no opto flyback , msop-16 with high voltage spacing lt3798 off-line isolated no opto-coupler flyback controller with active pfc v in and v out limited only by external components lt3573/lt3574/lt3575 40v isolated flyback converters monolithic no-opto flybacks with integrated 1.25a/0.65a/2.5a switch lt3757a/lt3759/ lt3758 40v/100v flyback/boost controllers universal controllers with small package and powerful gate drive lt3957/lt3958 40v/100v flyback/boost converters monolithic with integrated 5a/3.3a switch lt c ? 3803/ltc3803-3/ ltc3803-5 200khz/300khz flyback controllers in sot-23 v in and v out limited by external components ltc3805/ltc3805-5 adjustable frequency flyback controllers v in and v out limited by external components efficiency vs load current output load and line regulation 8v to 36v in /12v out micropower isolated flyback converter lt8301 t1 1:1 d2 d1 z1 r fb sw 40h 40h d1: central cmhd4448 d2: diode inc. dfls160 t1: wrth 750313972 z1: central cmdz5250b en/uvlo 806k 4.7f v in v in 8v to 36v v out + 12v 2.5ma to 270ma (v in = 12v) 2.5ma to 360ma (v in = 24v) 2.5ma to 400ma (v in = 36v) v out ? gnd 118k 232k 10f 8301 ta08a load current (ma) 0 65 efficiency (%) 70 75 80 85 90 95 100 200 300 400 8301 ta08b v in = 12v v in = 24v v in = 36v load current (ma) 0 output voltage (v) 12.0 12.1 12.2 400 8301 ta08c 11.9 11.8 11.6 100 200 300 11.7 12.4 12.3 v in = 12v v in = 24v v in = 36v lt8301 8301f for more information www.linear.com/lt8301

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